The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Nov. 14, 2019
Applicant:

Globalfoundries U.s. Inc., Santa Clara, CA (US);

Inventors:

Hui Zang, Guilderland, NY (US);

Ruilong Xie, Niskayuna, NY (US);

Shesh Mani Pandey, Saratoga Springs, NY (US);

Assignee:

GlobalFoundries U.S. Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 29/42328 (2013.01); H01L 29/42352 (2013.01); H01L 29/42364 (2013.01); H01L 29/51 (2013.01);
Abstract

One illustrative integrated circuit (IC) product disclosed herein includes a selection gate electrode and a first gate insulation layer positioned above a substrate and a memory gate electrode positioned above the substrate and adjacent the selection gate electrode, wherein the memory gate electrode comprises a bottom surface and first and second opposing sidewall surfaces. This embodiment of the IC product also includes a plurality of layers of insulating material, wherein a first portion of the layers of insulating material is positioned between the first gate insulation layer and the first opposing sidewall of the memory gate electrode, a second portion of the layers of insulating material is positioned between the bottom surface of the memory gate electrode and the upper surface of the semiconductor substrate, and a third portion of the layers of insulating material is positioned on the second opposing sidewall of the conductive memory gate electrode.


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