The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2022

Filed:

Aug. 31, 2021
Applicant:

Absolics Inc., Covington, GA (US);

Inventors:

Youngho Rho, Daejeon, KR;

Sungjin Kim, Suwanee, GA (US);

Jincheol Kim, Hwaseong-si, KR;

Assignee:

ABSOLICS INC., Covington, GA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/15 (2006.01); H01L 21/48 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 21/486 (2013.01); H01L 23/15 (2013.01); H01L 23/49833 (2013.01); H01L 25/0652 (2013.01);
Abstract

A packaging glass substrate for semiconductor includes a glass substrate with a first surface and a second surface facing each other, and a plurality of core vias penetrating through the glass substrate in a thickness direction, wherein a plain line is a line linking places where the core vias are not formed, a via line is a line linking places where the core vias are formed, a stress difference value (P) is a value according to Equation (1), and the stress difference value (P) is 1.5 MPa or less, Equation (1): P=Vp−Np where P is a stress difference value measured at the same glass substrate, Vp is a difference between the maximum value and the minimum value of stress measured at the via line, and Np is a difference between the maximum value and the minimum value of stress measured at the plain line.


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