The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2022

Filed:

Jul. 14, 2020
Applicants:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Tsmc Nanjing Company Limited, Nanjing, CN;

Tsmc China Company Limited, Shanghai, CN;

Inventors:

Yuan Ma, Shanghai, CN;

Ke-Liang Shang, Nanjing, CN;

Xin-Yong Wang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); G06F 30/392 (2020.01); H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); G06F 30/392 (2020.01); H01L 27/1104 (2013.01); H01L 27/1116 (2013.01);
Abstract

A memory device includes a first plurality of program lines of a first group, a second plurality of program lines of a second group, and a plurality of address lines. The second plurality of program lines are disposed next to and are parallel to the first plurality of program lines. The plurality of address lines are coupled to the first plurality of program lines and the second plurality of program lines respectively. The plurality of address lines are twisted and are intersected with the first plurality of program lines and the second plurality of program lines in a layout view. At least two adjacent program lines of the first plurality of program lines or the second plurality of program lines have lengths different from each other. A method is also disclosed herein.


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