The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2022
Filed:
Jun. 09, 2020
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Jeremy Binfet, Boise, ID (US);
Mark Helm, Santa Cruz, CA (US);
William Filipiak, Boise, ID (US);
Mark Hawes, Boise, ID (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/419 (2006.01); G11C 16/24 (2006.01); G11C 7/10 (2006.01); G11C 7/22 (2006.01); G11C 7/08 (2006.01); G11C 16/20 (2006.01); G11C 16/26 (2006.01); G11C 7/20 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 7/08 (2013.01); G11C 7/1015 (2013.01); G11C 7/1072 (2013.01); G11C 7/20 (2013.01); G11C 7/227 (2013.01); G11C 16/20 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); G11C 16/0483 (2013.01); G11C 2207/2281 (2013.01);
Abstract
Systems, devices, and methods related to reset read are described. A reset read may be employed to initiate a transition of a portion of memory array into a first state or maintain a portion of memory array in a first state, such as a transient state. A reset read may provide a highly-parallelized, energy-efficient option to ensure memory blocks are in the first state. Various modes of reset read may be configured according to different input.