The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2022

Filed:

Jan. 08, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kanwaljit Singh, Rotterdam, NL;

Ravi Pillarisetty, Portland, OR (US);

Nicole K. Thomas, Portland, OR (US);

Payam Amin, Portland, OR (US);

Roman Caudillo, Portland, OR (US);

Hubert C. George, Portland, OR (US);

Jeanette M. Roberts, North Plains, OR (US);

Zachary R. Yoscovits, Beaverton, OR (US);

James S. Clarke, Portland, OR (US);

Lester Lampert, Portland, OR (US);

David J. Michalak, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); G06N 10/00 (2022.01); H01L 29/43 (2006.01); H01L 29/49 (2006.01); H01L 29/778 (2006.01); H01L 29/78 (2006.01); H01L 29/82 (2006.01); H01L 29/12 (2006.01); B82Y 10/00 (2011.01); H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66977 (2013.01); B82Y 10/00 (2013.01); G06N 10/00 (2019.01); H01L 29/127 (2013.01); H01L 29/437 (2013.01); H01L 29/495 (2013.01); H01L 29/4966 (2013.01); H01L 29/66484 (2013.01); H01L 29/7613 (2013.01); H01L 29/7782 (2013.01); H01L 29/7831 (2013.01); H01L 29/7842 (2013.01); H01L 29/82 (2013.01);
Abstract

Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer; a first gate above the quantum well stack, wherein the first gate includes a first gate metal; and a second gate above the quantum well stack, wherein the second gate includes a second gate metal, and a material structure of the second gate metal is different from a material structure of the first gate metal; wherein the quantum well layer has a first strain under the first gate, a second strain under the second gate, and the first strain is different from the second strain.


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