The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2022

Filed:

Mar. 23, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventor:

William J. Gallagher, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/12 (2006.01); H01L 21/033 (2006.01); H01L 43/02 (2006.01); H01L 27/22 (2006.01); H01F 41/34 (2006.01); H01F 10/32 (2006.01);
U.S. Cl.
CPC ...
H01L 43/12 (2013.01); H01F 41/34 (2013.01); H01L 21/0332 (2013.01); H01L 27/222 (2013.01); H01L 43/02 (2013.01); H01F 10/329 (2013.01); H01F 10/3254 (2013.01);
Abstract

Some examples relate to a method for forming a semiconductor device. The method comprises forming a pattern definition stack over a substrate, the pattern definition stack comprising a transfer layer, an interlayer arranged over the transfer layer, and a patterning layer arranged over the interlayer. The method further comprises forming a first opening in the patterning layer to expose an upper surface of the interlayer and etching the interlayer with an at least partially isotropic etchant through the first opening to form a recessed cavity. The method further comprises forming a conformal layer over the interlayer and the patterning layer to fill the first opening, and etching the conformal layer and the transfer layer with an anisotropic etch to form a second opening in the transfer layer. The method also comprises depositing a hard mask material in the second opening.


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