The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2022

Filed:

Aug. 28, 2020
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Han-Wen Chen, Cupertino, CA (US);

Steven Verhaverbeke, San Francisco, CA (US);

Guan Huei See, Singapore, SG;

Giback Park, San Jose, CA (US);

Giorgio Cellere, Torri di Quartesolo, IT;

Diego Tonini, Treviso, IT;

Vincent Dicaprio, Pleasanton, CA (US);

Kyuil Cho, Santa Clara, CA (US);

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/768 (2006.01); H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 23/13 (2006.01); H01L 23/14 (2006.01); H01L 25/10 (2006.01); H01L 23/66 (2006.01); H01Q 1/22 (2006.01); H01Q 1/24 (2006.01); H05K 1/02 (2006.01); H01L 21/50 (2006.01); H01L 25/065 (2006.01); H01L 27/06 (2006.01); H01L 21/60 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/486 (2013.01); H01L 21/4864 (2013.01); H01L 21/50 (2013.01); H01L 21/76802 (2013.01); H01L 23/13 (2013.01); H01L 23/147 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/49866 (2013.01); H01L 23/49894 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 23/66 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 27/0688 (2013.01); H01Q 1/2283 (2013.01); H01Q 1/243 (2013.01); H05K 1/0243 (2013.01); H01L 2021/60007 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1035 (2013.01);
Abstract

The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.


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