The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2022
Filed:
Mar. 07, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Kevin J. Lee, Beaverton, OR (US);
Yih Wang, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/22 (2006.01); G11C 11/18 (2006.01); H01L 43/06 (2006.01); H01L 43/14 (2006.01); H01L 43/04 (2006.01); G11C 11/16 (2006.01); H01L 43/12 (2006.01); H01L 43/08 (2006.01); H01L 21/66 (2006.01); H01F 41/34 (2006.01); H01L 43/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/228 (2013.01); G11C 11/161 (2013.01); G11C 11/18 (2013.01); H01F 41/34 (2013.01); H01L 22/22 (2013.01); H01L 27/22 (2013.01); H01L 27/222 (2013.01); H01L 27/226 (2013.01); H01L 43/04 (2013.01); H01L 43/06 (2013.01); H01L 43/065 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 43/12 (2013.01); H01L 43/14 (2013.01);
Abstract
Approaches for embedding spin hall MTJ devices into a logic processor, and the resulting structures, are described. In an example, a logic processor includes a logic region including fin-FET transistors disposed in a dielectric layer disposed above a substrate. The logic processor also includes a memory array including a plurality of two-transistor one magnetic tunnel junction (MTJ) spin hall electrode (2T1MTJ SHE) bit cells. The transistors of the 2T1MTJ SHE bit cells are fin-FET transistors disposed in the dielectric layer.