The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Mar. 02, 2020
Applicants:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Tsmc China Company Limited, Shanghai, CN;

Inventors:

Ya-Qi Ma, Shanghai, CN;

Lei Pan, Shanghai, CN;

Zhen Tang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0266 (2013.01); H01L 27/0292 (2013.01); H01L 27/0617 (2013.01);
Abstract

An integrated circuit includes a pull-up circuit, an electrostatic discharge (ESD) primary circuit, and a pull-down circuit. The pull-up circuit is coupled between a pad and a first voltage terminal. The ESD primary circuit includes a first terminal which is coupled to the pad and the pull-up circuit, and a second terminal coupled to a second voltage terminal different from the first voltage terminal. The pull-down circuit has a first terminal which is coupled to the pad, the ESD primary circuit and the pull-up circuit, and a second terminal coupled to the second voltage terminal. The pull-down circuit includes at least one first transistor of a first conductivity type having a first terminal coupled to the first terminal of the pull-down circuit. A breakdown voltage of the at least one first transistor is greater than a trigger voltage of the ESD primary circuit.


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