The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Aug. 08, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yi-Lun Chen, Taichung, TW;

Bau-Ming Wang, Kaohsiung, TW;

Chun-Hsiung Lin, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01); H01L 21/8234 (2006.01); H01L 21/311 (2006.01); H01L 21/3115 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6653 (2013.01); H01L 21/0257 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 21/30604 (2013.01); H01L 21/31144 (2013.01); H01L 21/31155 (2013.01); H01L 21/823431 (2013.01); H01L 21/823468 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/76834 (2013.01);
Abstract

A semiconductor device includes a substrate, an isolation structure, a first gate structure, a first gate spacer, and an epitaxy structure. The substrate has a semiconductor fin. The isolation structure is over the substrate and laterally surrounds the semiconductor fin. The first gate structure is over the substrate and crosses the semiconductor fin. The first gate spacer extends along a sidewall of the first gate structure, in which the first gate spacer has a stepped sidewall distal to the first gate structure. The epitaxy structure is over the semiconductor fin, in which the epitaxy structure is in contact with the stepped sidewall of the first gate spacer.


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