Circuit of communication interface between two dies and method to manage communication interface

Abstract

A circuit of communication interface between dies is provided. The circuit includes a first interface of the first die having a serializer to serialize an input data of N bits a serialized data for transmitting out and a second interface of the second die having a de-serializer to receive and deserialize the serialized data into a de-serialized data. In addition, an interconnection structure connected between the first die and the second die to connect the serializer and the de-serializer, wherein the interconnection structure is an interposer or a redistribution layer of a semiconductor structure to form a parallel bus for transmitting the serialized data in one line of the parallel bus between the first die and the second die. A clock generator provides a first clock to a first ripple counter of the serializer and a second clock to a second ripple counter of the de-serializer.