The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2022
Filed:
Mar. 09, 2021
Xilinx, Inc., San Jose, CA (US);
Javier Cabezas Rodriguez, Campbell, CA (US);
Juan J. Noguera Serra, San Jose, CA (US);
David Clarke, Dublin, IE;
Sneha Bhalchandra Date, Santa Clara, CA (US);
Tim Tuan, San Jose, CA (US);
Peter McColgan, Dublin, IE;
Jan Langer, Chemnitz, DE;
Baris Ozgul, Dublin, IE;
Xilinx, Inc., San Jose, CA (US);
Abstract
An integrated circuit can include a data processing engine (DPE) array having a plurality of tiles. The plurality of tiles can include a plurality of DPE tiles, wherein each DPE tile includes a stream switch, a core configured to perform operations, and a memory module. The plurality of tiles can include a plurality of memory tiles, wherein each memory tile includes a stream switch, a direct memory access (DMA) engine, and a random-access memory. The DMA engine of each memory tile may be configured to access the random-access memory within the same memory tile and the random-access memory of at least one other memory tile. Selected ones of the plurality of DPE tiles may be configured to access selected ones of the plurality of memory tiles via the stream switches.