The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2022

Filed:

Dec. 12, 2019
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Haiyang Zhang, Shanghai, CN;

Shiliang Ji, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66818 (2013.01); H01L 21/3065 (2013.01); H01L 21/3083 (2013.01); H01L 21/823412 (2013.01); H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 29/0673 (2013.01); H01L 29/6681 (2013.01); H01L 29/66545 (2013.01); H01L 29/7853 (2013.01);
Abstract

Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate having a first region; forming a plurality of first initial fin structures on the first region of the semiconductor substrate; forming a dummy gate structure across the first initial fin structures by covering portions of top and sidewall surfaces of the first initial fin structures; forming a dielectric layer covering sidewall surfaces of the dummy gate structure and exposing a top surface of the dummy gate structure; removing the dummy gate structure to form a first opening in the dielectric layer and expose portions of top and sidewall surfaces of the first initial fin structures; and performing at least one trimming process on the first initial fin structures to form fin first structures. A width of each first fin structure is smaller than a width of each first initial fin structure.


Find Patent Forward Citations

Zhang, Haiyang. (2022). Semiconductor structure and fabrication method thereof (U.S. Patent No. 11329144). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11329144

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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