The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2022

Filed:

Jan. 22, 2021
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Ju Il Eom, Icheon-si, KR;

Han Jun Bae, Icheon-si, KR;

Seung Yeop Lee, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/64 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/49822 (2013.01); H01L 23/5386 (2013.01); H01L 23/642 (2013.01); H01L 24/05 (2013.01); H01L 24/20 (2013.01); H01L 25/0657 (2013.01); H01L 2224/2105 (2013.01); H01L 2224/221 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06565 (2013.01);
Abstract

A semiconductor package includes a substrate and a sub semiconductor package disposed over the substrate. The sub semiconductor package includes a sub semiconductor chip which has chip pads on its active surface facing the substrate, a sub molding layer which surrounds side surfaces of the sub semiconductor chip and has one surface facing the substrate, and redistribution conductive layers which are connected to the chip pads and extend over the one surface of the sub molding layer. The redistribution conductive layers include a signal redistribution conductive layer, which extends onto an edge of the sub molding layer and has a signal redistribution pad on its end portion, and a power redistribution conductive layer, which has a length shorter than a length of the signal redistribution conductive layer and has a power redistribution pad on its end portion.


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