The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2022

Filed:

Dec. 10, 2018
Applicant:

Shinko Electric Industries Co., Ltd., Nagano, JP;

Inventors:

Yasuyoshi Horikawa, Nagano, JP;

Yoshihiro Ihara, Nagano, JP;

Yoshihiro Kita, Nagano, JP;

Hikaru Tanaka, Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/498 (2006.01); H05K 1/14 (2006.01); H01L 25/16 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3114 (2013.01); H01L 23/3128 (2013.01); H01L 23/49827 (2013.01); H01L 23/5387 (2013.01); H01L 23/66 (2013.01); H01L 25/0657 (2013.01); H01L 25/16 (2013.01); H05K 1/144 (2013.01); H01L 2223/6655 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06572 (2013.01);
Abstract

A semiconductor device includes a flexible wiring substrate. The wiring substrate includes at least two mounting portions and at least one connecting portion. The mounting portions are stacked spaced apart from each other. Each connecting portion is bent to connect two mounting portions that are adjacent in a stacking direction. The semiconductor device further includes at least one semiconductor chip mounted on at least one of the at least two mounting portions and a plurality of conductive connecting members connecting the mounting portions to each other in the stacking direction.


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