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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11302366 B1

PDFFull Text
Date of Patent:
Apr. 12, 2022

Filed:

Oct. 14, 2020

Method and system for enhanced read performance in low pin count interface

Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Kuen-Long Chang, Taipei, TW;

Su-Chueh Lo, Hsinchu, TW;

Yung-Feng Lin, Taoyuan, TW;

Assignee:

MACRONIX INTERNATIONAL CO., LTD., Hsinchu, TW;

Attorneys:

Andrew L. Dunlap

Haynes Beffel & Wolfeld LLP

Primary Examiner:

Muna A Techane

Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/22 (2006.01); G06F 9/445 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G11C 7/1006 (2013.01); G06F 9/3806 (2013.01); G06F 9/44505 (2013.01); G11C 7/1045 (2013.01); G11C 7/1057 (2013.01); G11C 7/1084 (2013.01); G11C 7/222 (2013.01);
Abstract

A memory device supporting multi-address read operations improves throughput on a bi-directional serial port. The device includes a memory array and an input/output port having an input mode and an output mode. The input/output port has at least one signal line used alternately in both the input and output modes. A controller includes logic configured to execute a multi-address read operation in response to receiving a read command on the input/output port in the input mode, the multi-address read operation including receiving a first address and a second address using the at least one signal line in the input mode before switching to the output mode, switching to the output mode and outputting data identified by the first address using the at least one signal line.

Find Patent Forward Citations

Chang, Kuen-Long. (2022). Method and system for enhanced read performance in low pin count interface (U.S. Patent No. 11302366). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11302366

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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