The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2022
Filed:
Mar. 16, 2020
Murata Manufacturing Co., Ltd., Kyoto-fu, JP;
Kenji Sasaki, Nagaokakyo, JP;
Masao Kondo, Nagaokakyo, JP;
Shigeki Koya, Nagaokakyo, JP;
Shinnosuke Takahashi, Nagaokakyo, JP;
Yasunari Umemoto, Nagaokakyo, JP;
Isao Obu, Nagaokakyo, JP;
Takayuki Tsutsui, Nagaokakyo, JP;
Murata Manufacturing Co., Ltd., Kyoto-fu, JP;
Abstract
A semiconductor device includes two cell rows, each of which is formed of a plurality of transistor cells aligned in parallel to each other. Each of the plurality of transistor cells includes a collector region, a base region, and an emitter region that are disposed above a substrate. A plurality of collector extended wiring lines are each connected to the collector region of a corresponding one of the plurality of transistor cells and are extended in a direction intersecting an alignment direction of the plurality of transistor cells. A collector integrated wiring line connects the plurality of collector extended wiring lines to each other. A collector intermediate integrated wiring line that is disposed between the two cell rows in plan view connects the plurality of collector extended wring lines extended from the plurality of transistor cells that belong to one of the two cell rows to each other.