The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2022

Filed:

Sep. 09, 2020
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Siddhartha Nath, Santa Clara, CA (US);

Vishal Khandelwal, Portland, OR (US);

Sudipto Kundu, Sunnyvale, CA (US);

Ravi Mamidi, Milpitas, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/396 (2020.01); G06F 30/3947 (2020.01); G06N 20/00 (2019.01); G06F 30/3953 (2020.01); G06K 9/62 (2022.01); G06N 5/00 (2006.01);
U.S. Cl.
CPC ...
G06F 30/3947 (2020.01); G06F 30/396 (2020.01); G06F 30/3953 (2020.01); G06K 9/6232 (2013.01); G06K 9/6256 (2013.01); G06N 5/003 (2013.01); G06N 20/00 (2019.01);
Abstract

Training data is collected for each training integrated circuit (IC) design of a set of training IC designs by: extracting a first set of IC design features in a first stage of an IC design flow, and extracting a first set of IC design labels in a second stage of the IC design flow, where the first stage of the IC design flow occurs earlier than the second stage of the IC design flow in the IC design flow. Next, a machine learning model is trained based on the training data.


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