The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2022

Filed:

Aug. 31, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Taehyo Kim, Daegu, KR;

Daeseok Byeon, Seongnam-si, KR;

Taehong Kwon, Seoul, KR;

Chanho Kim, Seoul, KR;

Taeyun Lee, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G06F 12/02 (2006.01); G06F 12/123 (2016.01); G06F 12/0811 (2016.01); G11C 11/4091 (2006.01); G11C 11/408 (2006.01); G11C 11/4074 (2006.01); G06F 12/14 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 12/0811 (2013.01); G06F 12/123 (2013.01); G06F 12/1433 (2013.01); G11C 11/4074 (2013.01); G11C 11/4085 (2013.01); G11C 11/4091 (2013.01);
Abstract

A memory device comprises a memory cell region including a first metal pad, and a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, wherein the memory cell region includes a first memory area having first memory cells storing N-bit data and a second memory area having second memory cells storing M-bit data, where 'M' and 'N' are natural numbers and M is greater than N, and the peripheral circuit region includes a controller configured to read data stored in the first memory area using a first read operation, read data stored in the second memory area using a second read operation different from the first read operation, and selectively store data in one of the first memory area and the second memory area based on a frequency of use (FOU) of the data.


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