The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2022

Filed:

Apr. 23, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Peng-Soon Lim, Kluang, MY;

Da-Yuan Lee, Jhubei, TW;

Kuang-Yuan Hsu, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 21/8234 (2006.01); H01L 21/285 (2006.01); H01L 21/311 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42376 (2013.01); H01L 21/285 (2013.01); H01L 21/2855 (2013.01); H01L 21/28114 (2013.01); H01L 21/28247 (2013.01); H01L 21/31105 (2013.01); H01L 21/823456 (2013.01); H01L 29/4236 (2013.01); H01L 29/4966 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01);
Abstract

A method includes forming a trench over a substrate, wherein the trench is surrounded by gate spacers and an inter-layer dielectric layer, depositing a dielectric layer on a bottom and along sidewalls of the trench, depositing a metal layer over the dielectric layer, depositing a protection layer over the metal layer, wherein the protection layer has an uneven thickness, applying an etch-back process to the protection layer and the metal layer, wherein as a result of applying the etch-back process, a portion of the metal layer has been removed and at least a portion of the protection layer remains at the bottom of the trench and removing the protection layer from the trench.


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