The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Jun. 21, 2019
Applicant:
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Inventors:
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); B81B 7/00 (2006.01); H01L 23/10 (2006.01); B06B 1/06 (2006.01); H01L 21/56 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3142 (2013.01); B06B 1/0629 (2013.01); B81B 7/0077 (2013.01); B81C 1/00158 (2013.01); H01L 21/565 (2013.01); H01L 23/10 (2013.01); B81B 7/0032 (2013.01); H01L 2924/1461 (2013.01);
Abstract
A semiconductor package structure includes a substrate; a first die on the substrate, wherein an active surface of the first die is facing away from the substrate; a second die on the active surface of the first die, electrically connected to the first die through a plurality of conductive terminals; and a sealing structure on the active surface of the first die, surrounding the plurality of conductive terminals and abutting the second die thereby forming a cavity between the first die and the second die. A method for manufacturing the semiconductor package structure is also provided.