The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Nov. 19, 2019
Applicant:
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Inventors:
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED, Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/3213 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823456 (2013.01); H01L 21/02118 (2013.01); H01L 21/02274 (2013.01); H01L 21/28088 (2013.01); H01L 21/32136 (2013.01); H01L 21/32138 (2013.01); H01L 21/823431 (2013.01); H01L 29/66545 (2013.01);
Abstract
A method for forming a semiconductor arrangement includes forming a first gate structure over a first active region. The first gate structure includes a first conductive layer. An etch process is performed using a process gas mixture to recess the first gate structure and define a recess. The etch process comprises a first phase to form a polymer layer over the first conductive layer and to modify a portion of the first conductive layer to form a modified portion of the first conductive layer and a second phase to remove the polymer layer and to remove the modified portion of the first conductive layer.