The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Apr. 30, 2020
Samsung Electronics Co., Ltd., Suwon-si, KR;
Seungjin Kim, Hwaseong-si, KR;
Byung-Hyun Lee, Hwaseong-si, KR;
Yoonyoung Choi, Seoul, KR;
Tae-Kyu Kim, Hwaseong-si, KR;
Heesook Cheon, Seoul, KR;
Bo-Wo Choi, Suwon-si, KR;
Hyun-Sil Hong, Hwaseong-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
A method of fabricating a semiconductor device including preparing a substrate including a wafer inner region and a wafer edge region, the wafer inner region including a chip region and a scribe lane region, sequentially stacking a mold layer and a supporting layer on the substrate, forming a first mask layer on the supporting layer, the first mask layer including a first stepped region on the wafer edge region, forming a step-difference compensation pattern on the first stepped region, forming a second mask pattern including openings, on the first mask layer and the step-difference compensation pattern, and sequentially etching the first mask layer, the supporting layer, and the mold layer using the second mask pattern as an etch mask to form a plurality of holes in at least the mold layer may be provided.