The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2022

Filed:

Sep. 29, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Mark A. Schmisseur, Phoenix, AZ (US);

Raj K. Ramanujan, Federal Way, WA (US);

Filip Schmole, Portland, OR (US);

David M. Lee, Portland, OR (US);

Ishwar Agarwal, Hillsboro, OR (US);

David J. Harriman, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 13/42 (2006.01); G06F 12/02 (2006.01); G06F 12/12 (2016.01);
U.S. Cl.
CPC ...
G06F 13/1694 (2013.01); G06F 13/4282 (2013.01); G06F 12/0246 (2013.01); G06F 12/12 (2013.01);
Abstract

Aspects of the disclosure are directed to systems, methods, and devices that include an application processor. The application processor includes an interface logic to interface with a communication module using a bidirectional interconnect link compliant with a peripheral component interconnect express (PCIe) protocol. The interface logic to receive a data packet from across the link, the data packet comprises a header and data payload; determine a hint bit set in the header of the data packet; determine a steering tag value in the data packet header based on the hint bit set; and transmit the data payload to non-volatile memory based on the steering tag set in the header.


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