The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 2021
Filed:
Sep. 30, 2019
Applicant:
Infineon Technologies Austria Ag, Villach, AT;
Inventors:
Hans Weber, Bayerisch Gmain, DE;
Christian Fachmann, Fuernitz, AT;
Franz Hirler, Isen, DE;
Winfried Kaindl, Unterhaching, DE;
Markus Rochel, Radebeul, DE;
Assignee:
Infineon Technologies Austria AG, Villach, AT;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/265 (2006.01); H01L 21/3105 (2006.01); H01L 21/762 (2006.01); H01L 21/765 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7802 (2013.01); H01L 21/265 (2013.01); H01L 21/31053 (2013.01); H01L 21/765 (2013.01); H01L 21/76224 (2013.01); H01L 21/823487 (2013.01); H01L 29/0634 (2013.01); H01L 29/402 (2013.01);
Abstract
A method and a transistor device are disclosed. The method includes: forming a trench in a first surface in an edge region of a semiconductor body; forming an insulation layer in the trench and on the first surface of the semiconductor body; and planarizing the insulation layer so that a trench insulation layer that fills the trench remains, wherein forming the insulation layer comprises a thermal oxidation process.