Air gap spacer and related methods

Abstract

A method of forming an air-gap spacer in a semiconductor device includes providing a device including a gate stack, a plurality of spacer layers disposed on a sidewall of the gate stack, and a source/drain feature adjacent to the gate stack. In some embodiments, a first spacer layer of the plurality of spacer layers is removed to form an air gap on the sidewall of the gate stack. In various examples, a first sealing layer is then deposited over a top portion of the air gap to form a sealed air gap, and a second sealing layer is deposited over the first sealing layer. Thereafter, a first self-aligned contact (SAC) layer is etched from over the source/drain feature using a first etching process. In various embodiments, the first etching process selectively etches the first SAC layer while the first and second sealing layers remain unetched.