Field-effect transistor structure and fabrication method

Abstract

The present disclosure relates to a method for fabricating an FET structure. The method includes forming on a substrate a first semiconductor structure and an insulator structure covering the first semiconductor structure with a first insulator layer, forming on the first insulator layer a sacrificial layer extending to a reference plane, forming a second insulator layer on the reference plane, forming a first cavity through the second insulator layer, the sacrificial layer and the first insulator layer, thus exposing a surface of the first semiconductor structure, filling the first cavity with a second semiconductor structure extending from the surface at least up to the first reference plane, forming a third semiconductor structure on the second semiconductor structure, selectively removing the sacrificial layer, thus forming a second cavity, and filling the second cavity with a gate structure.