The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2021
Filed:
Mar. 24, 2020
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Jaspreet Singh Gandhi, San Jose, CA (US);
Gamal Refai-Ahmed, Santa Clara, CA (US);
Suresh Ramalingam, Fremont, CA (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/12 (2006.01); H01L 23/427 (2006.01); H01L 23/373 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 25/065 (2006.01); H01L 23/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/427 (2013.01); H01L 21/565 (2013.01); H01L 23/10 (2013.01); H01L 23/373 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01);
Abstract
A chip package assembly and method for fabricating the same are provided which incorporate phase change materials within the chip package assembly for improved thermal management. In one example, a chip package assembly is provided that includes a substrate, a first integrated circuit (IC) die stacked on the substrate, a dielectric filler layer, a cover and a phase change material. The phase change material is sealed within a recess formed between the first IC dies and the cover.