The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2021

Filed:

Feb. 14, 2020
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Akhilesh Kumar Singh, Austin, TX (US);

Nishant Lakhera, Austin, TX (US);

Chee Seng Foong, Austin, TX (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49861 (2013.01); H01L 21/4839 (2013.01); H01L 21/4842 (2013.01); H01L 21/4853 (2013.01); H01L 23/49816 (2013.01);
Abstract

A method of manufacturing a hybrid package including a flat package and a Wafer Level Chip Scale Package (WLCSP) is disclosed. The method includes fabricating a strip including a plurality of flat packages attached to each other via metal pins, turning the strip upside down, applying a layer of a thermal interface material (TIM) on each of the flat packages while the each of the flat packages is turned upside down, mounting the WLCSP on the layer of the TIM such that a top side of the WLCSP is interfaced with the layer of the TIM, curing the layer of the TIM and singulating each of the flat packages by cutting the metal pins and bending the metal pins.


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