The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2021

Filed:

Dec. 20, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Russell A. Benson, Boise, ID (US);

Silvia Borsari, Boise, ID (US);

Vinay Nair, Boise, ID (US);

Ying Rui, Meridian, ID (US);

Somik Mukherjee, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/3213 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02247 (2013.01); H01L 21/0217 (2013.01); H01L 21/02252 (2013.01); H01L 21/31116 (2013.01); H01L 21/32137 (2013.01);
Abstract

Methods, apparatuses, and systems related to a semiconductor nitridation passivation are described. An example method includes performing a dry etch process on a semiconductor structure on a wafer in a semiconductor fabrication process. The method further includes performing a dry strip process on the semiconductor structure. The method further includes performing a first wet strip clean process on the semiconductor. The method further includes performing a second wet strip clean process on the semiconductor. The method further includes performing a nitridation passivation on the semiconductor structure to avoid oxidization of the semiconductor structure. The method further performing a spacer material deposition on the semiconductor structure.


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