The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 2021
Filed:
Aug. 06, 2020
Vanguard International Semiconductor Corporation, Hsinchu, TW;
Shao-Chang Huang, Hsinchu, TW;
Kai-Chieh Hsu, Taoyuan, TW;
Chun-Chih Chen, New Taipei, TW;
Li-Fan Chen, Hsinchu, TW;
Ching-Ho Li, Hsinchu, TW;
Ting-You Lin, Hsinchu, TW;
Gong-Kai Lin, Yilan County, TW;
Yeh-Ning Jou, Hsinchu, TW;
Chien-Hsien Song, Kaohsiung, TW;
Hsiao-Ying Yang, Hsinchu, TW;
Chien-Chi Hsu, Hsinchu, TW;
Fu-Chun Tseng, Taipei, TW;
Vanguard International Semiconductor Corporation, Hsinchu, TW;
Abstract
A semiconductor device includes a semiconductor substrate, a Schottky layer, a plurality of first doped regions, a plurality of second doped regions, a first conductive layer and a second conductive layer. The semiconductor substrate includes a first conductive type, and the Schottky layer is disposed on the semiconductor substrate. The first doped regions and the second doped regions include a second conductive type, and which are disposed within the semiconductor substrate. The first doped regions are in parallel and extended along a first direction, and the second doped regions are in parallel and extended along a second direction to cross the first doped regions, thereby to define a plurality of grid areas. The first conductive layer is disposed on the Schottky layer, and the second conductive layer is disposed under the semiconductor substrate.