The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 2021
Filed:
Apr. 13, 2020
Applicant:
Hefechip Corporation Limited, Sai Ying Pun, HK;
Inventor:
Geeng-Chuan Chern, Cupertino, CA (US);
Assignee:
HeFeChip Corporation Limited, Sai Ying Pun, HK;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/112 (2006.01); H01L 29/66 (2006.01); H01L 21/285 (2006.01); H01L 21/265 (2006.01); H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11206 (2013.01); H01L 21/26513 (2013.01); H01L 21/28518 (2013.01); H01L 29/665 (2013.01); H01L 29/66484 (2013.01); H01L 29/66553 (2013.01);
Abstract
A MOS transistor includes a semiconductor substrate, a drain region and a source region in the semiconductor substrate, a channel region between the drain region and the source region, a gate electrode on the channel region, and a gate dielectric layer between the gate electrode and the semiconductor substrate. The gate dielectric layer has different thicknesses. The MOS transistor has a gate-to-source/drain breakdown voltage that is lower than a gate-to-channel breakdown voltage and a gated source/drain junction breakdown voltage.