The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2021

Filed:

Dec. 04, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Jack Liu, Taipei, TW;

Jiann-Tyng Tzeng, Hsinchu, TW;

Chih-Liang Chen, Hsinchu, TW;

Chew-Yuen Young, Cupertino, CA (US);

Sing-Kai Huang, Yunlin County, TW;

Ching-Fang Huang, Taipei, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/762 (2006.01); H01L 21/761 (2006.01); H01L 21/84 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1211 (2013.01); H01L 21/761 (2013.01); H01L 21/76264 (2013.01); H01L 21/845 (2013.01); H01L 29/1083 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes following operations. A substrate including an active area is received. A plurality of source/drain regions of a plurality of transistor devices are formed in the active area. An isolation region is inserted between two adjacent source/drain regions of two adjacent transistor devices. The isolation region and the two adjacent source/drain regions cooperatively form two diode devices electrically connected in a back to back manner.


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