The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2021
Filed:
Dec. 29, 2016
Applicant:
Intel Ip Corporation, Santa Clara, CA (US);
Inventors:
Sonja Koller, Regensburg, DE;
Georg Seidemann, Landshut, DE;
Reinhard Mahnkopf, Oberhaching, DE;
Bernd Waidhas, Pettendorf,, DE;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/367 (2006.01); H01L 23/373 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49568 (2013.01); H01L 23/00 (2013.01); H01L 23/367 (2013.01); H01L 23/3675 (2013.01); H01L 23/3736 (2013.01); H01L 23/49551 (2013.01); H01L 23/49575 (2013.01); H01L 23/49838 (2013.01); H01L 23/49861 (2013.01); H01L 23/5386 (2013.01); H01L 23/5387 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/73253 (2013.01);
Abstract
A system-in-package apparatus includes a square wave lead frame that provides a recess for a first semiconductive device as well as a feature for a second device. The system-in-package apparatus includes a printed wiling board that is wrapped onto the lead frame after a manner to enclose the first semiconductive device into the recess.