The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2021

Filed:

Dec. 20, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yao-Jen Hsieh, Taipei, TW;

Kai-Ming Liu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 30/39 (2020.01); G06F 30/392 (2020.01); H01L 27/02 (2006.01); G06F 119/18 (2020.01);
U.S. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 30/39 (2020.01); G06F 2119/18 (2020.01); Y02P 90/02 (2015.11);
Abstract

A method includes operation below: extracting layout patterns that include interconnection layers between a first terminal and a second terminal coupled to the first terminal, in a layout design of a circuit; comparing a first portion of the layout patterns with a first coding portion that specifies a first layout constraint, in which the first portion of the layout patterns is extracted in a sequence starting from the first terminal or to the first terminal; comparing a second portion of the layout patterns with a second coding portion that specifies a second layout constraint, in which the second portion of the layout patterns is extracted in a sequence from the second terminal or to the second terminal; in response to comparisons, initiating fabrication of at least one element of the circuit according to the layout design.


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