The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2021

Filed:

Dec. 05, 2019
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Chaoqi Zhang, San Diego, CA (US);

Rajneesh Kumar, San Diego, CA (US);

Li-Sheng Weng, San Diego, CA (US);

Darryl Sheldon Jessie, San Diego, CA (US);

Suhyung Hwang, Rancho Mission Viejo, CA (US);

Jeahyeong Han, San Diego, CA (US);

Xiaoming Chen, San Diego, CA (US);

Jaehyun Yeon, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 21/56 (2006.01); H01L 21/67 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/56 (2013.01); H01L 21/67121 (2013.01); H01L 23/3114 (2013.01);
Abstract

A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.


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