The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2021
Filed:
May. 28, 2020
United Microelectronics Corp., Hsin-Chu, TW;
Purakh Raj Verma, Singapore, SG;
Kuo-Yuh Yang, Hsinchu County, TW;
Chia-Huei Lin, Hsinchu, TW;
Chu-Chun Chang, Kaohsiung, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
An integrated circuit device includes a substrate and an integrated circuit area on the substrate. The integrated circuit area includes a dielectric stack. A cap layer is disposed on the dielectric stack. A seal ring is disposed in the dielectric stack and around a periphery of the integrated circuit area. A trench is formed around the seal ring to expose a sidewall of the dielectric stack. A MIM capacitor including a CTM layer and a CBM layer is disposed on the dielectric stack. A moisture blocking layer continuously covers the integrated circuit area and the MIM capacitor. The cap layer is interposed between the CTM layer and the CBM layer of the MIM capacitor and functions as a capacitor dielectric layer of the MIM capacitor. The moisture blocking layer extends to the sidewall of the dielectric stack, thereby sealing a boundary between two adjacent dielectric films in the dielectric stack.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile