The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 24, 2021
Filed:
Jan. 21, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Koushik Banerjee, Milpitas, CA (US);
Sanjay Rangan, Albuquerque, NM (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G11C 13/00 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0028 (2013.01); G11C 11/56 (2013.01); G11C 13/004 (2013.01); G11C 13/0026 (2013.01); G11C 13/0069 (2013.01); G11C 2213/71 (2013.01);
Abstract
An apparatus is described. The apparatus includes a cross-point non volatile memory cell array comprised of a first plurality of access lines and a second orthogonal plurality of access lines. Each of the first plurality of access lines are coupled to a first address decoder through a respective pass transistor. The pass transistor is coupled to control circuitry to bias the pass transistor into one of at least two states that include a first active state determined from a second address decoder and a second active state determined from the second address decoder.