The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11094358 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 17, 2021

Filed:

Sep. 30, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ilya Karpov, Portland, OR (US);

Yih Wang, Portland, OR (US);

Fatih Hamzaoglu, Portland, OR (US);

James Clarke, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); G11C 11/00 (2006.01); G11C 11/22 (2006.01); G11C 11/407 (2006.01); H01L 27/108 (2006.01); H01L 27/11514 (2017.01); H01L 27/11507 (2017.01); G11C 11/401 (2006.01);
U.S. Cl.
CPC ...
G11C 11/005 (2013.01); G11C 11/221 (2013.01); G11C 11/2259 (2013.01); G11C 11/407 (2013.01); H01L 27/10814 (2013.01); H01L 27/11507 (2013.01); H01L 27/11514 (2013.01); G11C 11/22 (2013.01); G11C 11/401 (2013.01); G11C 2213/71 (2013.01);
Abstract

An apparatus is described. The apparatus includes a semiconductor chip that includes logic circuitry, embedded dynamic random access memory (DRAM) cells and embedded ferroelectric random access memory (FeRAM) cells.


Find Patent Forward Citations

Karpov, Ilya. (2021). Semiconductor chip manufacturing process for integrating logic circuitry, embedded dram and embedded non-volatile ferroelectric random access memory (feram) on a same semiconductor die (U.S. Patent No. 11094358). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11094358

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