The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2021

Filed:

Oct. 03, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Xu-Sheng Wu, Hsinchu, TW;

Chang-Miao Liu, Hsinchu, TW;

Hui-Ling Shang, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/3115 (2006.01); H01L 27/092 (2006.01); H01L 21/3205 (2006.01); H01L 29/49 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6656 (2013.01); H01L 21/3115 (2013.01); H01L 21/31144 (2013.01); H01L 21/32055 (2013.01); H01L 27/0924 (2013.01); H01L 29/4983 (2013.01); H01L 29/66545 (2013.01);
Abstract

A method includes forming a dummy gate structure over a substrate, forming a plurality of gate spacers respectively on opposite sidewalls of the dummy gate structure and having a first dielectric constant, removing the dummy gate structure to form a gate trench between the gate spacers, forming a dopant source layer to line the gate trench, annealing the dopant source layer to diffuse k-value reduction impurities from the dopant source layer into the gate spacers to lower the first dielectric constant of the gate spacers to a second dielectric constant, and forming a replacement gate stack in the gate trench.


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