The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2021

Filed:

Apr. 01, 2020
Applicant:

Ememory Technology Inc., Hsin-Chu, TW;

Inventors:

Yu-Ping Huang, Hsinchu County, TW;

Chun-Hung Lin, Hsinchu County, TW;

Cheng-Da Huang, Hsinchu County, TW;

Assignee:

EMEMORY TECHNOLOGY INC., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/4091 (2006.01); G11C 11/408 (2006.01); G11C 11/4094 (2006.01); G11C 5/06 (2006.01); G11C 11/4074 (2006.01); G11C 5/02 (2006.01); G11C 11/4093 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 5/025 (2013.01); G11C 5/06 (2013.01); G11C 11/4074 (2013.01); G11C 11/4085 (2013.01); G11C 11/4093 (2013.01); G11C 11/4094 (2013.01);
Abstract

A non-volatile memory includes a memory cell array, an amplifying circuit and a first multiplexer. The memory cell array includes m×n memory cells. The memory cell array is connected with a control line, m word lines and n local bit lines, wherein m and n are positive integers. The amplifying circuit includes n sensing elements. The n sensing elements are respectively connected between the n local bit lines and n read bit lines. The first multiplexer is connected with the n local bit lines and the n read bit lines. According to a first select signal, the first multiplexer selects one of the n local bit lines to be connected with a first main bit line and selects one of the n read bit lines to be connected with a first main read bit line.


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