The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2021

Filed:

Sep. 09, 2020
Applicants:

Global Unichip Corporation, Hsinchu, TW;

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ting-Hao Wang, Hsinchu, TW;

Hsin-Han Han, Hsinchu, TW;

Yu-Chu Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1009 (2013.01); H03M 1/10 (2013.01); H03M 1/12 (2013.01);
Abstract

An analog to digital converter (ADC) device includes ADC circuits, a calibration circuit, and a skew adjusting circuit. The ADC circuits convert an input signal according to interleaved clock signals, in order to generate first quantized outputs. The calibration circuit performs at least one calibration computation according to the first quantized outputs to generate second quantized outputs. The skew adjusting circuit determines maximum value signals, to which the second quantized outputs correspond in a predetermined interval, and averages the maximum value signals to generate a reference signal, and compares the reference signal with each of the maximum value signals to generate detecting signals, and determines whether the detecting signals are adjusted or not according to a signal frequency to generate adjusting signals, in order to reduce a clock skew in the ADC circuits.


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