Managing pre-programming of a memory device for a reflow process

Abstract

A logic state to be stored at a memory cell of a memory device is determined, where the logic state is to be represented by a threshold voltage stored at the memory cell. A verify reference voltage associated with the logic state is determined. The verify reference voltage defines a target voltage level of the threshold voltage associated with the logic state. The verify reference voltage is updated using an amount of compensation for an expected shift in the threshold voltage of the memory cell after heat is applied to the memory device. Before the heat is applied to the memory device, a plurality of sets of multiple programming pulses to the memory cell is applied until a threshold condition is satisfied. The threshold condition is associated with a relative magnitude of the threshold voltage of the memory cell to the updated verify reference voltage.