The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2021

Filed:

Feb. 04, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Naveen Prabhu Vittal Prabhu, Folsom, CA (US);

Bharat M. Pathak, Folsom, CA (US);

Aliasgar S. Madraswala, Folsom, CA (US);

Yogesh B. Wakchaure, Folsom, CA (US);

Violante Moschiano, Bacoli, IT;

Walter Di Francesco, Silvi Marina, IT;

Michele Incarnati, Avezzano, IT;

Antonino Giuseppe La Spina, Ramacca, IT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); G11C 29/44 (2006.01); G11C 29/52 (2006.01); G11C 11/56 (2006.01); G06F 11/07 (2006.01); G11C 16/10 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1048 (2013.01); G06F 11/076 (2013.01); G06F 11/1072 (2013.01); G11C 11/5628 (2013.01); G11C 16/10 (2013.01); G11C 29/44 (2013.01); G11C 29/52 (2013.01); G11C 2029/0411 (2013.01); G11C 2211/5621 (2013.01);
Abstract

A memory device that has been programmed to store a single bit or multiple bits can perform a determination of a number of threshold voltages in one or more threshold voltage level regions. Based on the number of threshold voltages meeting or exceeding a threshold level, a page of bits can be read and if the bit error rate of the page of bits is below a threshold rate, the page of bits can be stored in the cells together with other bits stored in the cells and a provided additional page of bits. However, if the bit error rate of the page of bits is at or above the threshold rate, then the bit or bits stored in the cells can be error corrected and stored together with a provided additional page of bits.


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