The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Jun. 27, 2019
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Liang Yi, Singapore, SG;

Zhiguo Li, Singapore, SG;

Chi Ren, Singapore, SG;

Qiuji Zhao, Singapore, SG;

Boon Keat Toh, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11521 (2017.01); H01L 29/788 (2006.01); H01L 29/51 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01); H01L 29/42328 (2013.01); H01L 29/513 (2013.01); H01L 29/518 (2013.01); H01L 29/788 (2013.01);
Abstract

A structure of memory device includes trench isolation lines in a substrate, extending along a first direction. An active region in the substrate is between adjacent two of the trench isolation lines. A dielectric layer is disposed on the active region of the substrate. A floating gate corresponding to a memory cell is disposed on the dielectric layer between adjacent two of the trench isolation lines. The floating gate has a first protruding structure at a sidewall extending along the first direction. A first insulating layer crosses over the floating gate and the trench isolation lines. A control gate line is disposed on the first insulating layer over the floating gate, extending along a second direction intersecting with the first direction. The control gate line has a second protruding structure correspondingly stacked over the first protruding structure of the floating gate.


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