The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Jul. 26, 2019
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Nihaar N. Mahatme, Austin, TX (US);

Alexander Hoefler, Austin, TX (US);

Brad John Garni, Austin, TX (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/04 (2006.01); G11C 7/12 (2006.01); G11C 11/419 (2006.01); G11C 7/18 (2006.01); H04L 9/32 (2006.01); G11C 11/418 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 7/18 (2013.01); G11C 11/418 (2013.01); G11C 11/419 (2013.01); H04L 9/3278 (2013.01); H04L 2209/125 (2013.01);
Abstract

A data processing system and method for generating a digital code for use as a physically unclonable function (PUF) response is provided. The method includes activating a plurality of word lines for a read operation. A first bit line is coupled to a first input of a comparator during the read operation. A second bit line is coupled to a second input of the comparator during the read operation. A current is generated on each of the first and second bit lines. The currents on the first and second bit lines are converted to voltages. The voltage on the first bit line is compared to the voltage on the second bit line. A logic bit is output from the comparator as part of the digital code, a logic state of the logic bit is determined in response to the comparison. By selecting multiple word lines to determine a PUF response, noise immunity is improved.


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