System and method to drive logic circuit with non-deterministic clock edge variation

Abstract

Embodiments of the disclosure provide systems and methods to operate a logic circuit with non-deterministic clock edge variations. A system may include a clock coupled to a logic circuit, the logic circuit having a set of source latches coupled to a set of capture latches through a set of logic cones. The clock includes a fixed clock component configured to generate a clock signal having a first clock edge, and a jitter clock component coupled to the fixed clock component and configured to modify the clock signal to have a second clock edge based on a non-deterministic value. The clock transmits the clock signal with the second clock edge to drive the set of source latches and the set of capture latches of the logic circuit. A clock controller coupled to the jitter clock component generates the non-deterministic value.