The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Apr. 29, 2020
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Padmaraj Sanjeevarao, Austin, TX (US);

Jon Scott Choy, Austin, TX (US);

Anirban Roy, Austin, TX (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/16 (2006.01); G11C 17/18 (2006.01); G11C 17/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1675 (2013.01); G11C 11/1655 (2013.01); G11C 11/1657 (2013.01); G11C 11/1659 (2013.01); G11C 17/165 (2013.01); G11C 17/18 (2013.01);
Abstract

A magnetoresistive random access memory (MRAM) array has a corresponding MRAM cell, including a Magnetic Tunnel Junction (MTJ), at an intersection of each row and column. A first row of the array is configured as a single one-time-programmable (OTP) row, wherein a first MRAM cell in a first column is connected to a second MRAM cell in a second column. A first MTJ of the first MRAM cell is connected to a first bit line of the first column, and a second MTJ of the second MRAM cell is not connected to a second bit line of the second column. During a write to the first MRAM cell, write circuitry is configured to connect the first and second bit lines and the corresponding source lines such that the select transistors in the first and second MRAM cells are connected in parallel to drive a write current through the first MTJ.


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