The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2021

Filed:

Jul. 20, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Hao Wang, Hsinchu County, TW;

Wai-Yi Lien, Hsinchu, TW;

Gwan-Sin Chang, Hsinchu, TW;

Yu-Ming Lin, Hsinchu, TW;

Ching Hsueh, Taipei, TW;

Jia-Chuan You, Taoyuan, TW;

Chia-Hao Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 29/417 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 29/41791 (2013.01); H01L 29/66545 (2013.01); H01L 29/7847 (2013.01); H01L 29/7855 (2013.01); H01L 29/7848 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes forming a semiconductor fin on a substrate. A dummy gate structure is formed crossing the semiconductor fin. The dummy gate structure is replaced with a metal gate structure. An epitaxial structure is formed in the semiconductor fin after replacing the dummy gate structure with the metal gate structure.


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