The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2021

Filed:

Dec. 19, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Pankaj Sharma, Boise, ID (US);

Muralikrishnan Balakrishnan, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 27/108 (2006.01); H01L 45/00 (2006.01); H01L 49/00 (2006.01); H01L 29/786 (2006.01); G11C 11/22 (2006.01); H01L 27/11502 (2017.01); G11C 11/4091 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10814 (2013.01); G11C 11/221 (2013.01); H01L 27/11502 (2013.01); H01L 29/78642 (2013.01); H01L 29/78672 (2013.01); H01L 45/06 (2013.01); H01L 45/085 (2013.01); H01L 45/1233 (2013.01); H01L 45/141 (2013.01); H01L 45/144 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); H01L 49/003 (2013.01); G11C 11/2257 (2013.01); G11C 11/2259 (2013.01); G11C 11/2273 (2013.01); G11C 11/4085 (2013.01); G11C 11/4091 (2013.01);
Abstract

Some embodiments include a memory cell having a non-ohmic device between a transistor source/drain region and a capacitor. Some embodiments include a memory cell having a transistor with a first source/drain region, a second source/drain region, and a channel region between the first and second source/drain regions. A capacitor is electrically coupled to the second source/drain region through a non-ohmic device. The non-ohmic device includes a non-ohmic-device-material which changes conductivity in response to an electrical property along the channel region. The non-ohmic-device-material has a high-resistivity-mode when the electrical property along the channel region is below a threshold level, and transitions to a low-resistivity-mode when the electrical property along the channel region meets or exceeds the threshold level. Some embodiments include a memory array.


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